c++ - Simple MIPS Instructions and Compilers -


What is Compiler (for example GCC) to generate an instruction, which is a register to an empty memory element Loads in? Like ... 0 (SP) where memory [sp + 0] = 0. The 1st essentially just $ 0 place ($ r) I ask because I've been looking through the hex dump of an executable file (the executable file, LW C is the result of compiling ++ file) and I manually have been verified and if I Objedmp would start State Entry Point then instructs me that does it. I'm not sure that I should have an error, if it's just a common compiler action, it seems that there is a poor way of registering a register. At ADDU $, $ 0, $ 0 would be better or SLL $, $ 0, $ 0 ..

The entry point is 400890. Lastly, the jumping target of the burn is an empty space (I am probably wrong ...) Note that my last example was arbitrarily arbitrarily.

And just to be clear, -32636 + GP is an empty space. I can post the memory content at the point if you want proof :) 

  00400890 & lt; __ starts>: 400890: 03e00021 take zero, ra 400894: 04,110,001 hair 40089c & lt; __ start + 0xc> 400898: 00000000 Knopp 40089c: 3c1c0fc0 lui gp, 0xfc0 4008a0: 279c7864 Adiu GP, GP, 30820 4008 A4: 039 F 021 Aduu GP, GP, RA 4008 A8: 0000 F-821 for RA, null 4008 AC: 8 F 848 034 L. W. A., -32716 (GP) 4008B: 8 FA 50000 LW a1,0 (SP) 4008b4: 27a60004 addiu a2, sp, 4 4008b8: 2401fff8 li, -8 4008bc: 03a1e824 and sp, sp, on 4008c0: 27bdffe0 addiu SP, SP, -32 4008c4: 8f878054 LW A3 - 32,684 (GP) 4008c8: 8f888084 LW t0, -32,636 (GP) of & lt; ------ directed 4008cc: 00000000 nop 4008d0: afa80010 sw t0,16 (SP) 4008d4: afa20014 sw v0,20 (SP) 4008d8: afbd0018 sw SP 24 (SP) 4008dc: 8f998068 LW T9, -32,664 (GP) 4008e0: 00000000 nop 4008e4: 0320f809 jalr T9 4008e8:. Water target 4010c0 is 00000000 nop  
  4010c0: 8f998010 LW T9, -32,752 (GP) 4010c4: 03e07821 step T7, Ra 4010c8: 0320f809 jalr T9

Maybe it's being put after a statement? If so, then that statement is run before jumping and nothing happens (NOP). In addition, this may be a compiler on low optimization settings. Another possibility is that the compiler is preserving the flag flags area. Shift and flags, while a load I do not believe.

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